library verilog; use verilog.vl_types.all; entity gt_infiniband_2 is generic( chan_bond_mode : string := "OFF"; chan_bond_one_shot: string := "FALSE"; clk_cor_insert_idl
http://www.codebf.com/read/159314/5585847
library verilog; use verilog.vl_types.all; entity gt_ethernet_1 is generic( clk_cor_insert_idle_flag: string := "FALSE"; clk_cor_keep_idle: string := "FALSE"; clk_cor_rep
http://www.codebf.com/read/159314/5585940
library verilog; use verilog.vl_types.all; entity x_gt is generic( align_comma_msb : string := "FALSE"; chan_bond_limit : integer := 16; chan_bond_mode : string := "OFF"
http://www.codebf.com/read/159314/5586047
#define U32 unsigned int #define U16 unsigned short #define S32 int #define S16 short int #define U8 unsigned char #define S8 char #define TRUE 1 #define FALSE 0 #define OK 1 #define FAIL 0 #defi
http://www.codebf.com/read/159284/5586514
http://www.codebf.com/read/159284/5586540
http://www.codebf.com/read/159284/5586646
http://www.codebf.com/read/159284/5586729
http://www.codebf.com/read/159284/5586933
http://www.codebf.com/read/159284/5586990
http://www.codebf.com/read/159284/5587078
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