基于NIOS的CF卡应用(包括了软件和硬件),ALTERA的IP库中只提供了底层的硬件寄存器描述头文件.这是个基于IP核HAL的软件,以及相应的硬件设计示例.

源代码在线查看: standard.asm.rpt.htm

软件大小: 1367 K
上传用户: a215290209
关键词: ALTERA NIOS HAL 软件
下载地址: 免注册下载 普通下载 VIP

相关代码

				
				
				
				Assembler report for standard
				
				
				
				
				
				
				
				Assembler report for standard
				Wed Apr 20 20:43:52 2005
				Version 5.0 Build 146 04/13/2005 SJ Full Version
				
				
				
				
				Table of Contents
				Top
				
				Legal Notice
				Assembler Summary
				Assembler Settings
				Assembler Generated Files
				Assembler Device Options: c:/Pabst/test_scratch/test/standard/standard.sof
				Assembler Device Options: c:/Pabst/test_scratch/test/standard/standard.pof
				Assembler Messages
				
				
				
				
				Legal Notice
				Top
				Copyright (C) 1991-2005 Altera Corporation
				Your use of Altera Corporation's design tools, logic functions 
				and other software and tools, and its AMPP partner logic       
				functions, and any output files any of the foregoing           
				(including device programming or simulation files), and any    
				associated documentation or information are expressly subject  
				to the terms and conditions of the Altera Program License      
				Subscription Agreement, Altera MegaCore Function License       
				Agreement, or other applicable license agreement, including,   
				without limitation, that your use is for the sole purpose of   
				programming logic devices manufactured by Altera and sold by   
				Altera or its authorized distributors.  Please refer to the    
				applicable agreement for further details.
				
				
				
				
				Assembler Summary
				Top
				
				
				Assembler Status
				Successful - Wed Apr 20 20:43:52 2005
				
				
				Revision Name
				standard
				
				
				Top-level Entity Name
				standard
				
				
				Family
				Stratix II
				
				
				Device
				EP2S60F672C5ES
				
				
				
				
				Assembler Settings
				Top
				
				
				Option
				Setting
				Default Value
				
				
				Generate Tabular Text File (.ttf) For Target Device
				On
				Off
				
				
				Use smart compilation
				Off
				Off
				
				
				Generate Serial Vector Format File (.svf) for Target Device
				Off
				Off
				
				
				Generate a JEDEC STAPL Format File (.jam) for Target Device
				Off
				Off
				
				
				Generate an uncompressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device
				Off
				Off
				
				
				Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device
				On
				On
				
				
				Generate compressed bitstreams
				on
				on
				
				
				Compression mode
				Off
				Off
				
				
				Clock source for configuration device
				Internal
				Internal
				
				
				Clock frequency of the configuration device
				10 MHz
				10 MHz
				
				
				Divide clock frequency by
				1
				1
				
				
				JTAG user code for target device
				Ffffffff
				Ffffffff
				
				
				Configuration device
				Auto
				Auto
				
				
				JTAG user code for configuration device
				Ffffffff
				Ffffffff
				
				
				Configuration device auto user code
				off
				off
				
				
				Generate Raw Binary File (.rbf) For Target Device
				Off
				Off
				
				
				Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device
				Off
				Off
				
				
				Hexadecimal Output File start address
				0
				0
				
				
				Hexadecimal Output File count direction
				Up
				Up
				
				
				Release clears before tri-states
				off
				off
				
				
				Auto-restart configuration after error
				On
				On
				
				
				Maintain Compatibility with All Stratix II MRAM Versions
				On
				On
				
				
				
				
				Assembler Generated Files
				Top
				
				
				File Name
				
				
				c:/Pabst/test_scratch/test/standard/standard.sof
				
				
				c:/Pabst/test_scratch/test/standard/standard.pof
				
				
				c:/Pabst/test_scratch/test/standard/standard.ttf
				
				
				
				
				Assembler Device Options: c:/Pabst/test_scratch/test/standard/standard.sof
				Top
				
				
				Option
				Setting
				
				
				Device 
				EP2S60F672C5ES
				
				
				JTAG usercode 
				0xFFFFFFFF
				
				
				Checksum 
				0x00D89744 
				
				
				
				
				Assembler Device Options: c:/Pabst/test_scratch/test/standard/standard.pof
				Top
				
				
				Option
				Setting
				
				
				Device 
				EPC16
				
				
				JTAG usercode 
				0x00000000
				
				
				Checksum 
				0x1BB53DFC 
				
				
				
				
				Assembler Messages
				Top
				
				Info: *******************************************************************
				Info: Running Quartus II Assembler
				    Info: Version 5.0 Build 146 04/13/2005 SJ Full Version
				    Info: Processing started: Wed Apr 20 20:43:00 2005
				Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off standard -c standard
				Warning: The EP2S60ES device is not POF compatible with the production EP2S60 device. You must recompile your design when you receive production devices.
				    Warning: Altera recommends you read the EP2S60ES errata available on our web site for additional information
				Info: Quartus II Assembler was successful. 0 errors, 2 warnings
				    Info: Processing ended: Wed Apr 20 20:43:51 2005
				    Info: Elapsed time: 00:00:52
				
				
				
				Top
				
				
				
				
				
							

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