mtv512mg + mx88v462 液晶电视驱动C完整程序

源代码在线查看: define.h.bak

软件大小: 277 K
上传用户: sinoarts
关键词: v462 mtv 512 462
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相关代码

				/*-------------------------------------------------------------------------
				DEFINE.H
				
				Copyright 2004 Macronix International Co., Ltd.
				-------------------------------------------------------------------------*/
				#ifndef _DEFINE_H_
				
					#define _DEFINE_H_
				
				//============== Declare Data type & value ============================
				
					typedef bit             Bit;
				
					typedef unsigned char   BYTE;
					typedef unsigned int    WORD;
					typedef unsigned long   LONG;
				
					#define DATA            data
					#define IDATA           idata
					#define PDATA           pdata
					#define XDATA           xdata
					#define RDATA           code
				
					#define	V462_WRID		0x28		//V462's	I2C write ID
					#define	EEPROM_WRID		0xA0		//EEPROM	I2C write ID
				
					#define	OSD_EN			0x16		
					
					#define	OSDADDR_L		0xF2		//OSD Addr Low byte Port
					#define	OSDADDR_H		0xF3		//OSD Addr Hi  byte Port
					#define	OSDDATA_L 		0xF4		//OSD Data Low byte Port
					#define	OSDDATA_H 		0xF5		//OSD Data Hi  byte Port
					#define	ORWCTRL			0xF6		//OSD Read/Write Control Port
					
						/*------	OSD External Reg. 0xE4 bit define	-------------------
						 *		bit		7 6 5 4 3 2 1 0
					 	 *				| |	|	  | +--		D1-0: Internal OSD accessing select
					 	 *				| | |	  |					00 - OSD control Reg.
					 	 *				| | |  	  |					01 - OSD RAM Font buffer
					 	 *				| | |     |					10 - OSD Display code buffer
					 	 *				| | |  	  |					11 - OSD Display attr buffer
					 	 *				| | |	  +----		D2: Internal OSD R/W enable
					 	 *				| | |						0  - Enable OSD Reg. and buf
						 * 			 	| | |						1  - Disable
					 	 *				| |	+ ---------		D5:Select Read/Write mode
					 	 *				| |							0  - Write mode
					 	 *				| |							1  - Read  mode
						 *				| + -----------		OSD Clear buffer bit
						 *				| 							0  - Normal
						 *				|							1  - Clear Code buffer to 0x59
						 *				|								 Clear Attr buffer to 0x00
						 *				+ -------------		OSD burst  mode Select	
						 *											0  - Single read/write mode
						 *											1  - Burst  read/write mode
						 *--------------------------------------------------------------------------*/
					#define	SEL_OSDCTRLREG	0x00		//Value for ORWCTRL(0xE4) Reg.
					#define SEL_OSDDISPCODE	0x02
					#define SEL_OSDDISPATTR	0x03
					#define CLR_OSD_BUF		0x40
					
					#define OSDCTRLREG		0x08		//OSD Control Reg index
					#define	OSDWINON		0x03		//Value for char border and main OSD ON
					#define OSDWINOFF		0x02		//Value for char border and main OSD OFF
					/*--------------------------------------------------------------------------
					 *	OSD Display code buffer is 256bytes(128chars) format is followed
					 *		bit		7 6 5 4 3 2 1 0		//Low byte
					 *				| |	
					 *				| |	
					 *				| + -----------		D6-0: Character Code
					 *				+ -------------		0: ROM Font 		1: RAM Font
					 *
					 *		bit		F E D C B A 9 8		//Hi  byte
					 *						  | | +		0: Blink OFF		1: Blink ON
					 *						  |	+--		0: BG transparent	1: BG opaque
					 *						  +----		0: Border OFF		1: Border ON
					 *
					 *	OSD Display Attr buffer is 256bytes(128chars) format is followed
					 *		bit		7 6 5 4 3 2 1 0		//Low byte: background color select
					 *		bit		F E D C B A 9 8		//Hi  byte: foreground color select
					 */
					
					//----------------------------------------------------------------------------
					
					#define	RX_PARSE	0x80						//pack data ready, wait process Parse routine
					#define	TV_STD_L	18
				
					
					#define	FG_COLOR		0x0A
					#define FG_COLOR_H		0x0E
					#define	BG_COLOR		0x01
				
												
					#define ENTER			0xE8
					#define	RIGHT			0xA8
					#define	LEFT			0xD8
					#define	UP				0xF8
					#define DOWN			0x68
					#define	MENU			0x88
					#define ONOFF			0x90
					
					#define MUTE			0x98
				//	#define SLEEP			0x81
				//	#define PP				0x82
				//	#define SYS				0x83
					#define CALL			0x30
					
					#define	N_0				0x28
					#define	N_1				0x02
					#define	N_2				0x32
					#define	N_3				0x20
					#define	N_4				0x00
					#define	N_5				0x50
					#define	N_6				0x78
					#define	N_7				0x70
					#define	N_8				0x58
					#define	N_9				0x38
					#define	N_SW			0xF0
							
					#define W_TYPE			0x01		//Type for Write in CVD1 
					#define R_TYPE			0x00
					
					#define GAMMA_CTR		0x0C
					#define	GAMMA_PORT		0x15
					
				
				//============== Special Pin define ===================================
				
				
					#define I2C_SCL			P1_3
					#define I2C_SDA			P1_2
					
					#define	I2C_SCL2		P1_1
					#define	I2C_SDA2		P1_0
					
					#define	AUDIO_CHANEL1	P7_7
					#define	AUDIO_CHANEL2	P7_6
					 
					#define	SYS_RST			P5_7
				
				//	#define	POWER			P5_0
				//	#define	TV_POWER		P5_1	// 
					#define	PANEL_EN		P5_6
				
				//	#define AUDIO_MUTE		P5_4
					
					#define	LED_R			P1_4
					#define	LED_G			P1_5
				
					#define	PWM_VOLUME		DA5
				
					#define	IR_SND			P3_4
				
				#endif			

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