使用TI DSP 2407A 进行开发的源代码
源代码在线查看： interrupt.c
#include "interrupt.h"
#include "DSP240x_Device.h"
#include "PWM.h"
int flag;
int shit1 =0;
int shit2 = 0;
void interrupt PHANTOM(void)
{
int i =0;
}
void XINT1_ISR (void)
{
#ifdef DEBUG1
port000c = XINT1_ENA;
#endif
}
void ADCINT_ISR(void)
{
#ifdef DEBUG1
port000c = ADCINT_ENA;
#endif
}
void SPIINT_ISR(void)
{
#ifdef DEBUG1
port000c = SPIINT_ENA;
#endif
}
void RXINT_ISR (void)
{
#ifdef DEBUG1
port000c = RXINT_ENA;
#endif
Sci_Get_String(uart_rec_char);
}
void TXINT_ISR (void)
{
#ifdef DEBUG1
port000c = TXINT_ENA;
#endif
}
void XINT2_ISR (void)
{
#ifdef DEBUG1
port000c = XINT2_ENA;
#endif
}
void PDPINTB_ISR(void)
{
#ifdef DEBUG1
port000c = PDPINTB_ENA;
#endif
flag = EVBIFRA & PDINTB_FLAG;
if(flag != PDINTB_FLAG)
return;
EVBIFRA = PDINTB_FLAG;
}
void PDPINTA_ISR(void)
{
#ifdef DEBUG1
port000c = PDPINTA_ENA;
#endif
flag = EVAIFRA & PDINTA_FLAG;
if(flag != PDINTA_FLAG)
return;
EVAIFRA = PDINTA_FLAG;
}
void CMP1INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP1INT_ENA;
#endif
flag = EVAIFRA & CMP1INT_FLAG;
if(flag != CMP1INT_FLAG)
return;
EVAIFRA = CMP1INT_FLAG;
}
void CMP2INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP2INT_ENA;
#endif
flag = EVAIFRA & CMP2INT_FLAG;
if(flag != CMP2INT_FLAG)
return;
EVAIFRA = CMP2INT_FLAG;
}
void CMP3INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP3INT_ENA;
#endif
flag = EVAIFRA & CMP3INT_FLAG;
if(flag != CMP3INT_FLAG)
return;
EVAIFRA = CMP3INT_FLAG;
}
void CMP4INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP4INT_ENA;
#endif
flag = EVBIFRA & CMP4INT_FLAG;
if(flag != CMP4INT_FLAG)
return;
EVBIFRA = CMP4INT_FLAG;
}
void CMP5INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP5INT_ENA;
#endif
flag = EVBIFRA & CMP5INT_FLAG;
if(flag != CMP5INT_FLAG)
return;
EVBIFRA = CMP5INT_FLAG;
}
void CMP6INT_ISR(void)
{
#ifdef DEBUG1
port000c = CMP6INT_ENA;
#endif
flag = EVBIFRA & CMP6INT_FLAG;
if(flag != CMP6INT_FLAG)
return;
EVBIFRA = CMP6INT_FLAG;
}
void T1PINT_ISR(void)
{
#ifdef DEBUG1
// port000c =T1PINT_ENA;
#endif
flag = EVAIFRA & T1PINT_FLAG;
if(flag != T1PINT_FLAG)
return;
shit1++;
if(shit1>300)
{
port000c =shit1;
shit1=0;
}
// wait_second(1);
EVAIFRA = T1PINT_FLAG;
}
void T1CINT_ISR(void)
{
#ifdef DEBUG1
// port000c = T1CINT_ENA;
#endif
flag = EVAIFRA & T1CINT_FLAG;
if(flag != T1CINT_FLAG)
return;
shit2++;
if(shit2>20)
{
port000c =shit2;
shit2 = 0;
}
EVAIFRA = T1CINT_FLAG;
//wait_second(1);
}
void T1UFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T1UFINT_ENA;
#endif
flag = EVAIFRA & T1UFINT_FLAG;
if(flag != T1UFINT_FLAG)
return;
EVAIFRA = T1UFINT_FLAG;
}
void T1OFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T1OFINT_ENA;
#endif
flag = EVAIFRA & T1OFINT_FLAG;
if(flag != T1OFINT_FLAG)
return;
EVAIFRA = T1OFINT_FLAG;
}
void T2PINT_ISR(void)
{
#ifdef DEBUG1
port000c = T2PINT_ENA;
#endif
flag = EVAIFRB & T2PINT_FLAG;
if(flag != T2PINT_FLAG)
return;
EVAIFRB = T2PINT_FLAG ;
}
void T2CINT_ISR(void)
{
#ifdef DEBUG1
port000c = T2CINT_ENA;
#endif
flag = EVAIFRB & T2CINT_FLAG;
if(flag != T2CINT_FLAG)
return;
EVAIFRB = T2CINT_FLAG ;
}
void T2UFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T2UFINT_ENA;
#endif
flag = EVAIFRB & T2UFINT_FLAG;
if(flag != T2UFINT_FLAG)
return;
EVAIFRB = T2UFINT_FLAG ;
}
void T2OFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T2OFINT_ENA;
#endif
flag = EVAIFRB & T2OFINT_FLAG;
if(flag != T2OFINT_FLAG)
return;
EVAIFRB = T2OFINT_FLAG ;
}
void T3PINT_ISR(void)
{
#ifdef DEBUG1
port000c = T3PINT_ENA;
#endif
flag = EVBIFRA & T3PINT_FLAG;
if(flag != T3PINT_FLAG)
return;
EVBIFRA = T3PINT_FLAG ;
}
void T3CINT_ISR(void)
{
#ifdef DEBUG1
port000c = T3CINT_ENA;
#endif
flag = EVBIFRA & T3CINT_FLAG;
if(flag != T3CINT_FLAG)
return;
EVBIFRA = T3CINT_FLAG ;
}
void T3UFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T3UFINT_ENA;
#endif
flag = EVBIFRA & T3UFINT_FLAG;
if(flag != T3UFINT_FLAG)
return;
EVBIFRA = T3UFINT_FLAG ;
}
void T3OFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T3OFINT_ENA;
#endif
flag = EVBIFRA & T3OFINT_FLAG;
if(flag != T3OFINT_FLAG)
return;
EVBIFRA = T3OFINT_FLAG ;
}
void CAP1INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP1INT_ENA;
#endif
flag = EVAIFRC & CAP1INT_FLAG;
if(flag != CAP1INT_FLAG)
return;
EVAIFRC = CAP1INT_FLAG;
}
void CAP2INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP2INT_ENA;
#endif
flag = EVAIFRC & CAP2INT_FLAG;
if(flag != CAP2INT_FLAG)
return;
EVAIFRC = CAP2INT_FLAG;
}
void CAP3INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP3INT_ENA;
#endif
flag = EVAIFRC & CAP3INT_FLAG;
if(flag != CAP3INT_FLAG)
return;
EVAIFRC = CAP3INT_FLAG;
}
void CAP4INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP4INT_ENA;
#endif
flag = EVBIFRC & CAP4INT_FLAG;
if(flag != CAP4INT_FLAG)
return;
EVBIFRC = CAP4INT_FLAG;
}
void CAP5INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP5INT_ENA;
#endif
flag = EVBIFRC & CAP5INT_FLAG;
if(flag != CAP5INT_FLAG)
return;
EVBIFRC = CAP5INT_FLAG;
}
void CAP6INT_ISR(void)
{
#ifdef DEBUG1
port000c = CAP6INT_ENA;
#endif
flag = EVBIFRC & CAP6INT_FLAG;
if(flag != CAP6INT_FLAG)
return;
EVBIFRC = CAP6INT_FLAG;
}
void T4PINT_ISR(void)
{
#ifdef DEBUG1
port000c = T4PINT_ENA;
#endif
flag = EVBIFRB & T4PINT_FLAG;
if(flag != T4PINT_FLAG)
return;
EVBIFRB = T4PINT_FLAG ;
}
void T4CINT_ISR(void)
{
#ifdef DEBUG1
port000c = T4CINT_ENA;
#endif
flag = EVBIFRB & T4CINT_FLAG;
if(flag != T4CINT_FLAG)
return;
EVBIFRB = T4CINT_FLAG ;
}
void T4UFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T4UFINT_ENA;
#endif
flag = EVBIFRB & T4UFINT_FLAG;
if(flag != T4UFINT_FLAG)
return;
EVBIFRB = T4UFINT_FLAG ;
}
void T4OFINT_ISR(void)
{
#ifdef DEBUG1
port000c = T4OFINT_ENA;
#endif
flag = EVBIFRB & T4OFINT_FLAG;
if(flag != T4OFINT_FLAG)
return;
EVBIFRB = T4OFINT_FLAG ;
}
void CANMBINT_ISR(void)
{
#ifdef DEBUG1
port000c = CANERINT_ENA;
#endif
}
void CANERINT_ISR(void)
{
#ifdef DEBUG1
port000c = CANERINT_ENA;
#endif
}
void interrupt GISR1 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x20:
{
PDPINTA_ISR();
break;
}
case 0x19:
{
PDPINTB_ISR();
break;
}
case 0x04:
{
ADCINT_ISR();
break;
}
case 0x01:
{
XINT1_ISR();
break;
}
case 0x11:
{
XINT2_ISR();
break;
}
case 0x05:
{
SPIINT_ISR();
break;
}
case 0x06:
{
RXINT_ISR();
break;
}
case 0x07:
{
TXINT_ISR();
break;
}
case 0x40:
{
CANMBINT_ISR();
break;
}
default:
break;
}
// IFR = 0x0001;
}
void interrupt GISR2 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x21:
{
CMP1INT_ISR();
break;
}
case 0x22:
{
CMP2INT_ISR();
break;
}
case 0x23:
{
CMP3INT_ISR();
break;
}
case 0x27:
{
T1PINT_ISR();
// EVAIFRA =0x0080;
break;
}
case 0x28:
{
T1CINT_ISR();
// EVAIFRA =0x0100;
break;
}
case 0x29:
{
T1UFINT_ISR();
break;
}
case 0x2A:
{
T1OFINT_ISR();
// EVAIFRA =0x0400;
break;
}
case 0x24:
{
CMP4INT_ISR();
break;
}
case 0x25:
{
CMP5INT_ISR();
break;
}
case 0x26:
{
CMP6INT_ISR();
break;
}
case 0x2F:
{
T3PINT_ISR();
break;
}
case 0x30:
{
T3CINT_ISR();;
break;
}
case 0x31:
{
T3UFINT_ISR();
break;
}
case 0x32:
{
T3OFINT_ISR();
break;
}
case 0x41:
{
CANERINT_ISR();
break;
}
default:
break;
}
// EVAIFRA = 0xFFFF;
// IFR = 0x0002;
}
void interrupt GISR3 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x2B:
{
T2PINT_ISR();
nNewConvert = 1;
break;
}
case 0x2C:
{
T2CINT_ISR();
break;
}
case 0x2D:
{
T2UFINT_ISR();
break;
}
case 0x2E:
{
T2OFINT_ISR();
break;
}
case 0x39:
{
T4PINT_ISR();
break;
}
case 0x3A:
{
T4CINT_ISR();
break;
}
default:
break;
}
// IFR = 0x0003;
}
void interrupt GISR4 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x3B:
{
T4UFINT_ISR();
break;
}
case 0x3C:
{
T4OFINT_ISR();
break;
}
case 0x33:
{
CAP1INT_ISR();
break;
}
case 0x34:
{
CAP2INT_ISR();
break;
}
case 0x35:
{
CAP3INT_ISR();
break;
}
case 0x36:
{
CAP4INT_ISR();
break;
}
case 0x37:
{
CAP5INT_ISR();
break;
}
case 0x38:
{
CAP6INT_ISR();
break;
}
default:
break;
}
// IFR = 0x0004;
}
void interrupt GISR5 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x05:
{
SPIINT_ISR();
break;
}
case 0x06:
{
RXINT_ISR();
break;
}
case 0x07:
{
TXINT_ISR();
break;
}
case 0x40:
{
CANMBINT_ISR();
break;
}
case 0x41:
{
CANERINT_ISR();
break;
}
default:
break;
}
// IFR = 0x0005;
}
void interrupt GISR6 (void)
{
int temp;
temp = PIVR;
switch(temp)
{
case 0x04:
{
ADCINT_ISR();
break;
}
case 0x01:
{
XINT1_ISR();
break;
}
case 0x11:
{
XINT2_ISR();
break;
}
default:
break;
}
// IFR = 0x0006;
}
/*
void interrupt GISR1 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
void interrupt GISR2 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
void interrupt GISR3 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
void interrupt GISR4 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
void interrupt GISR5 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
void interrupt GISR6 (void)
{
asm(" LDP #0E0H" );
asm(" LACC 0701Eh,1" );
asm(" ADD #_PVECTOR" );
asm(" BACC" );
}
*/
