verilog编写基于FPGA的示波器核心实现
源代码在线查看： wed.zsf
F:/fpga test/mcu_sram_test/mcu_sram_test.vwf 0 6151866 777 6151866 2
F:/fpga test/mcu_sram_test/sram_control.vwf 0 1000000 859 1000000 0
F:/fpga test/mcu_sram_test/mcu_fpga_control.vwf 1328000 2656000 830 1328000 2
mcu_fpga_control.vwf 0 10000000 20 1000 0
mcu_sram_test.vwf 0 20000000 20 1000 0
sram_control.vwf 0 1000000 20 1000 0
C:/Documents and Settings/Administrator/桌面/mcu_sram_test/mcu_sram_test.vwf 0 4541744 777 4541744 0
F:/fpga test/mcu_sram beta1.1/mcu_sram_test.vwf 429582 1861529 697 1281216 22
F:/fpga test/mcu_sram beta1.1/sram_control.vwf 229179 455896 859 250000 2
F:/fpga test/mcu_sram beta1.1/mcu_fpga_control.vwf 120052 1370052 859 1250000 20
F:/fpga test/mcu_sram beta1.1/dds_control.vwf 0 275708 779 275708 29
dds_control.vwf 0 1000000 20 1000 0
F:/fpga test/mcu_sram beta1.1/osc_control.vwf 0 1000000 20 1000 0
F:/fpga test/mcu_sram beta1.1/osc_disp.vwf 3571344 9523592 697 5325696 0
F:/fpga test/mcu_sram beta1.1/test_osc.vwf 0 100000000 762 100000000 3
osc_control.vwf 0 0 0 0 0
test_osc.vwf 0 100000000 20 1000 0
F:/fpga test/mcu_sram beta1.1/mfreq.vwf 0 1000000 20 1000 0
mfreq.vwf 0 1000000 20 1000 0
F:/fpga test/fpge示波器/mcu_sram beta1.1/mfreq.vwf 0 155800 779 155800 0
F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_sram_test.vwf 0 1246400 779 1246400 0
F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_disp.vwf 0 0 0 0 0
osc_disp.vwf 0 100000000 20 1000 0
F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.vwf 0 1000000 779 1000000 0
