FPGA的51内核（全）

				#add_file options
				add_file -vhdl -lib work "../vhdl/mc8051_p.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_cy_.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_cy_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_ovcy_.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_ovcy_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_core_.vhd"
				add_file -vhdl -lib work "../vhdl/addsub_core_struc.vhd"
				add_file -vhdl -lib work "../vhdl/comb_divider_.vhd"
				add_file -vhdl -lib work "../vhdl/comb_divider_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/comb_mltplr_.vhd"
				add_file -vhdl -lib work "../vhdl/comb_mltplr_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/dcml_adjust_.vhd"
				add_file -vhdl -lib work "../vhdl/dcml_adjust_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/alumux_.vhd"
				add_file -vhdl -lib work "../vhdl/alumux_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/alucore_.vhd"
				add_file -vhdl -lib work "../vhdl/alucore_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_alu_.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_alu_struc.vhd"
				add_file -vhdl -lib work "../vhdl/control_fsm_.vhd"
				add_file -vhdl -lib work "../vhdl/control_fsm_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/control_mem_.vhd"
				add_file -vhdl -lib work "../vhdl/control_mem_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_control_.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_control_struc.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_siu_.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_siu_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_tmrctr_.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_tmrctr_rtl.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_core_.vhd"
				add_file -vhdl -lib work "../vhdl/mc8051_core_struc.vhd"
				
				
				#implementation: "rev_1"
				impl -add rev_1 -type fpga
				
				#device options
				set_option -technology VIRTEX
				set_option -part XCV100
				set_option -package BG256
				set_option -speed_grade -4
				
				#compilation/mapping options
				set_option -default_enum_encoding default
				set_option -symbolic_fsm_compiler 0
				set_option -resource_sharing 0
				set_option -use_fsm_explorer 0
				
				#map options
				set_option -frequency 11.000
				set_option -run_prop_extract 1
				set_option -fanout_limit 100
				set_option -disable_io_insertion 0
				set_option -pipe 0
				set_option -update_models_cp 0
				set_option -verification_mode 0
				set_option -modular 0
				set_option -no_sequential_opt 0
				set_option -retiming 0
				set_option -fixgatedclocks 0
				
				#simulation options
				set_option -write_verilog 0
				set_option -write_vhdl 0
				
				#VIF options
				set_option -write_vif 1
				
				#automatic place and route (vendor) options
				set_option -write_apr_constraint 1
				
				#set result format/file last
				project -result_file "rev_1/mc8051_core_struc.edf"
				impl -active "rev_1"