ＥＤＡ基础教程

				-- 8-bit Identity Comparator
				-- uses 1993 std VHDL
				-- download from www.pld.com.cn & www.fpga.com.cn
				
				library IEEE;
				use IEEE.Std_logic_1164.all;
				entity HCT688 is  
				   port(Q, P : in std_logic_vector(7 downto 0);
				         GBAR : in std_logic; PEQ : out std_logic);
				end HCT688;
				
				architecture VER1 of HCT688 is
				begin
				   PEQ 				end VER1;