7 Series FPGAs Configurable Logic Block User Guide
This manual contains these chapters:
• Chapter 1, Overview, provides basic information needed for the majority of users,
including:
• CLB Overview is targeted at the new user.
• 7 Series CLB Features discusses what is new compared with the Spartan-6 and
Virtex-6 families for the experienced user and provides design migration
considerations.
• Device Resources indicates the number of resources per device, and unity
between different 7 Series families.
• Recommended Design Flow provides the basics of using CLB resources and lists
key aspects to consider.
• Pinout Planning discusses aspects of CLBs that might affect pin placement for a
design.
• Chapter 2, Functional Details, lists architectural specifics for each CLB feature.
• Chapter 3, Design Entry, provides design entry guidelines and primitives for
instantiation.
• Chapter 4, Applications, provides examples that use the CLB resources in larger
applications.
• Chapter 5, Timing, contains timing models and defines CLB timing specifications
from the respective 7 series FPGAs data sheet.
• Chapter 6, Advanced Topics, discusses advanced features of the 7 Series CLB.
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